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Maximizing FPGA Soft Processor Performance

Authored on: Jun 20, 2007 by Bryan Fletcher

Technical Paper / Conference Paper

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FPGA processors offer many advantages, but some designers have found the performance to be disappointing. Several case studies examine the effects of various embedded processor memory strategies and peripheral sets. Comparing the benchmark system to a real-world system, techniques for optimizing the performance in an FPGA embedded processor system are shown. This paper investigates the performance and cost trade-offs for several FPGA embedded processor systems, including minimal system running from internal FPGA memory, system running from external memory, system caching external memory, and system with many peripherals.



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