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Multilevel Signaling for Greater than 6Gb/s Serial Interconnect: Addressing the Implementation Channel

Authored on: Apr 11, 2007 by Bill Hoppin

Technical Paper / Conference Paper

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Understanding the synergistic influence between the active and passive components of the transmission channel is at the center of interconnect design decisions at target speeds of 6 Gigabits per second (Gb/s) and higher. At these frequencies, manufacturing and environmental variations of the total interconnect system have a significant impact on end performance. These variations are often overlooked, as their impact on lower-speed 2 to 3Gb/s systems has not affected interconnect or system performance as significantly as it does at higher data rates.

The collective synergy of these manufacturing and environmental variations on the active and passive components involved comprises the Implementation Channel, which provides an appropriate design target that guard bands for these known variations. The development of high-speed serial link (HSSL) technology for backplane applications is forcing closer examination of the Implementation Channel. Once the characteristics of the Implementation Channel are understood, effective transceiver technology design decisions can be made to account for them.



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