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A Detailed Look Into Hardware/Software Co-Verification

Authored on: Jun 20, 2006 by Jason Andrews

Technical Paper / Conference Paper

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This paper serves as an embedded system verification primer. It also provides a detailed look into the embedded system verification technique known as HW/SW coverification. It describes the evolution of hardware and software tools and the melding of disciplines that created the HW/SW co-verification environment. It then goes beyond co-verification and looks at the recent advances in FPGA technology and associated design tools which has enabled the use of RTL prototyping to perform HW/SW integration at speeds beyond what is available with HW/SW coverification. The goal is to provide engineers with a solid understanding of both technical principles and tangible benefits to a project. This knowledge will enable engineers to see through the hype and mystery surrounding co-verification and RTL prototyping and make educated decisions about which verification tools and methods to apply on specific design projects.

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