Op-Amp Design for Switched-Capacitor Stages in Pipelined ADCs
This paper presents a systematic approach to pipeline analog-to-digital converter (ADC) design, with emphasis on the design of the operational amplifier. The pipelined ADC performance is described in detail in terms of circuit specifications, and the highest-consuming power block, the interstage gain block, is discussed. The paper also shows how the selection of different op-amp technologies effects overall ADC performance.
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