RTL Design-for-Power for Mobile SoCs: Best Practices
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The mobile industry has revolutionized the way the world communicates and accesses information. Fueled by insatiable consumer demand and intense competition, innovation is breaking new frontiers. Mobile devices continue to pack more functionality and clock faster, but are required to conform to a lower power budget for extended battery life. Lowering power is a key design concern throughout the design cycle. This Educast focuses on Register Transfer Language (RTL) best practices for low-power mobile semiconductor design including early and reliable power budgeting, reduction, debug, and regressions. RTL as the highest level of hardware abstraction offers high-performance with acceptable power accuracy. Significant power related design decisions can be made during the RTL design stage since there is greater flexibility early in the design flow. The best practices will cover the key subset of RTL power tools and methodologies in use by mobile semiconductor design teams, with real-world examples.