Aldec, Inc.

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Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com

Headquarters: North America | Other Locations
Phone: 702-990-4400
Our Website: www.aldec.com

Industry: Automotive/Transportation // Communications and Networking Systems or Equipment // Computers and Peripherals // Consumer Electronics & Appliances // Aerospace/Defense/Government // Industrial/Robotics/Motor Control // Electronic Instrumentation or Test // Medical Devices & Systems // Semiconductor Design & Manufacturing // Security // Academia // Commercial/Retail
Application & Technologies: Boards/Buses // Design Tools (EDA) // Software/Hardware Development

Our TechOnline Content

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- FEATURED
  Using Plots for HDL Debugging as a Powerful Alternative to Traditional Waveforms
  
  Tools | Development // Debug
  
  Technical Paper 1 likes
- Why Simulation Matters: A Case for Riviera-PRO
  
  EDA | IP // Simulation
  
  Technical Paper 0 likes
- Using FPGA Prototyping Board as an SoC Verification and Integration Platform
  
  EDA | IP // Verification
  
  Technical Paper 0 likes
- FEATURED
  Using Plots for HDL Debugging as a Powerful Alternative to Traditional Waveforms
  
  Tools | Development // Debug
  
  Technical Paper 1 likes
- HDL Simulation and Mathematical Modeling Integration
  
  EDA | IP // Verification
  
  Technical Paper 0 likes
- Traditional Approach VS. In-Hardware Simulation with Aldec DO-254 CTS
  
  Digital Processing // Programmable Logic
  
  Technical Paper 0 likes

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Company Updates

- Aldec launches new requirements traceability tool, Spec-Tracer. Register to learn more at #DAC50. http://t.co/yfulmPYH4G
- Register for Aldec & @Agilent Joint DAC Tutorial: Wireless Algorithm Validation from System to RTL to Test http://t.co/c3piDx7IPD
- Register for Aldec Webinar: DO-254 Requirements Traceability (June 20) http://t.co/iA6odTzBZJ
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Aldec, Inc.

Aldec, Inc.

Our TechOnline Content

Our TechOnline Content

Using Plots for HDL Debugging as a Powerful Alternative to Traditional Waveforms

Why Simulation Matters: A Case for Riviera-PRO

Using FPGA Prototyping Board as an SoC Verification and Integration Platform

Using Plots for HDL Debugging as a Powerful Alternative to Traditional Waveforms

HDL Simulation and Mathematical Modeling Integration

Traditional Approach VS. In-Hardware Simulation with Aldec DO-254 CTS

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Company Updates

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